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Data Sheet No. PD60160-A IPS0551T FULLY PROTECTED POWER MOSFET SWITCH Features * * * * * Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Product Summary Rds(on) V clamp Ishutdown 5.2m (max) 40V 100A 4s Description The IPS0551T is a fully protected three terminal SMART POWER MOSFET that features over-current, over-temperature, ESD protection, and drain to source active clamp. This device combines a HEXFET(R) POWER MOSFET and a gate driver. It offers full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when temperature exceeds 165oC or when the drain current reaches 100A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Ton/Toff Package SUPER TO220 SUPER SMD220 Advance Information Typical Connection L oad D IN c o n tro l R in s e r ie s ( if n e e d e d ) L o g ic s ig n a l S www.irf.com 1 IPS0551T Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 m copper thickness. Symbol Parameter Vds Vin I+in Isd cont. Maximum drain to source voltage Maximum input voltage Maximum IN current Diode max. continuous current (1) (rth=60oC/W) (rth=5oC/W) Isd pulsed Diode max. pulsed current (1) Pd Maximum power dissipation(1) (rth=60oC/W) ESD1 ESD2 Tj max. Tlead Electrostatic discharge voltage (Human Body) Electrostatic discharge voltage (Machine Model) Max. storage & operating junction temp. Lead temperature (soldering, 10 seconds) Min. -- -0.3 -10 -- -- -- -- -- -- -40 -- Max. 37 7 +10 2.8 35 100 2 4 0.5 +150 300 Units V mA Test Conditions A W C=100pF, R=1500, kV o C=200pF, R=0, L=10H C Thermal Characteristics Symbol Parameter Rth Rth Rth Rth 1 2 3 4 Thermal Thermal Thermal Thermal resistance free air resistance to PCB min footprint resistance to PCB 1" sq. footprint resistance junction to case Min. -- -- -- -- Typ. 60 60 35 0.7 Max. Units Test Conditions -- -- -- a o C/W Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Continuous drain to source voltage High level input voltage Low level input voltage Continuous drain current Tamb=85 o C (TAmbient = 85oC, IN = 5V, rth = 80oC/W, Tj = 125oC) ( TAmbient = 85oC, IN = 5V, rth = 5oC/W, Tj = 125oC) Rin Recommended resistor in series with IN pin Tr-in (max) Max recommended rise time for IN signal (see fig. 2) Fr-Isc (2) Max. frequency in short circuit condition (Vcc = 14V) (1) Limited by junction temperature (pulsed current limited also by internal wiring) (2) Operations at higher switching frequencies is possible. See Appl. Notes. Vds (max) VIH VIL I ds Min. -- 4 0 -- -- 0.1 -- 0 Max. 18 6 0.5 8 35 0.5 1 1 Units V A k S kHz 2 www.irf.com IPS0551T Static Electrical Characteristics (Tj = 25oC unless otherwise specified. Standard footprint 70m of copper thickness) Symbol Parameter Rds(on) @Tj=25oC Min. o Typ. 4.5 7.5 0.01 40 43 0.85 8.0 1.5 90 130 Max. Units Test Conditions 5.2 8.8 25 -- 48 1 9.5 2 300 400 m A Vin = 5V, Ids = 10A Vcc = 14V, Tj = 25oC Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Id = 35A, Vin = 0V Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V over-current triggered ON state resistance Tj = 25 C ON state resistance Tj = 150oC Drain to source leakage current Drain to source clamp voltage 1 Drain to source clamp voltage 2 Body diode forward voltage IN to source clamp voltage IN threshold voltage Input supply current (normal operation) Input supply current (protection mode) -- -- 0 37 -- -- 7 1 25 50 Rds(on) @Tj=150oC Idss @Tj=25oC V clamp 1 V clamp 2 Vsd Vin clamp Vth Iin, on Iin, off V A Switching Electrical Characteristics Vcc = 14V, Resistive Load = 0.4, Rinput = 50, 100s pulse, Tj = 25oC, (unless otherwise specified). Symbol Parameter Ton Tr Trf Toff Tf Qin Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge Min. 0.25 0.25 -- 1.5 0.5 -- Typ. Max. Units Test Conditions 1 1 15 4 2 200 4 4 -- 8 5 -- See figure 2 s See figure 2 nC Vin = 5V Protection Characteristics Symbol Parameter T sd I sd V reset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (cf application note) Min. -- 60 1.5 2 100 Typ. 165 90 1.9 10 400 Max. Units Test Conditions -- 120 2.8 40 1200 o C A V s J See fig. 1 See fig. 1 V in = 0V, Tj = 25oC Vcc = 14V www.irf.com 3 IPS0551T Functional Block Diagram All values are typical DRAIN 37 V 200 100 k IN S Q Q I sense T > 165c 8V 80 A R I > Isd SOURCE Lead Assignments 2 (D) 123 In D S 123 In D S SUPER TO220 SUPER SMD220 (Advanced Information) 4 www.irf.com IPS0551T Vin 5V 0V 90 % Vin 10 % Ids I shutdown Isd t < T reset t > T reset Tr-in 90 % Ids T Tsd (165 c) 10 % Td on tr Td off tf T shutdown Vds Figure 1 - Timing diagram Figure 2 - IN rise time & switching time definitions T clamp Vin L Rem : V load is negative during demagnetization V load + R D 14 V - Ids Vds clamp Vin Vds ( Vcc ) 5v 0v IN S Vds Ids ( see Appl . Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms Figure 4 - Active clamp test circuit www.irf.com 5 IPS0551T All curves are typical values with standard footprint. Operating in the shaded area is not recommended. 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 200% 180% 160% 140% 120% Tj = 150oC 100% 80% 60% 40% 20% 0% Tj = 25oC 7 8 -50 -25 0 25 50 75 100 125 150 175 Figure 5 - Rds(on) (m) Vs Input Voltage (V) Figure 6 - Normalised Rds(on) (%) Vs Tj (oC) 40 35 30 25 20 15 10 5 0 0 1 2 3 4 5 6 7 8 ton delay 130% rdson 40 35 30 25 20 15 10 5 0 0 1 2 3 4 5 toff delay fall tim e rise tim e 6 7 8 Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V) Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) 6 www.irf.com IPS0551T 100 100 delay on rise time 130% rdson delay off fall tim e 10 10 1 1 10 100 1000 10 100 1000 Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs IN Resistor () Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor () 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 100 90 80 70 60 50 40 30 Isd 25C Ilim 25C 7 8 9 20 10 0 -50 -25 0 25 50 75 100 125 150 Figure 11 - Current Iim. & Ishutdown (A) Vs Vin (V) Figure 12 - Over-current (A) Vs Temperature (oC) www.irf.com 7 IPS0551T 100 90 80 70 60 50 40 30 20 10 0 -50 0 r t h = 1C /W (cas e t o ambient ) r t h = 5C /W r t h = 15C /W r t h = 30C /W: 1'' f o o t pr int r t h= 60C/W: s t d. f o o t pr int 1000 T=25C free air/ std. footprint T=100C free air/ std. footprint Current path capability should be above this curve 100 Load characteristic should be below this curve 10 50 100 150 200 1 Figure 13 - Max.Cont. Ids (A) Vs Amb. Temperature (oC) Figure 14 - Ids (A) Vs Protection Resp. Time (s) 1 .0 0 E +0 2 1000 s ingle puls e 10 Hz rth=60C/W dT=25C 100Hz rth=60C/W dT=25C 1k Hz rth=60C/W dT=25C 1 .0 0 E +0 1 100 1 .0 0 E +0 0 10 Single pulse 1 .0 0 E -0 1 1 Vbat = 14 V Tjini = T sd 1 .0 0 E -0 2 rth free air / std. fooprint rth 1 inch footprint rth infinite heatsink 0.1 0 .0 0 1 0 .0 1 0 .1 1 10 100 Figure 15 - Iclamp (A) Vs Inductive Load (mH) Figure 16 - Transient Thermal Imped. ( oC/W) Vs Time (s) 8 www.irf.com IPS0551T 200 180 160 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 150 Iin,on Iin,off 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 Treset rise time fall time 100 125 150 Figure 17 - Inputcurrent (A) Vs Junction (oC) Figure 18 - Turn-on, Turn-off and Treset (S) Vs Tj (oC) 120% 115% 110% 105% 100% 95% 90% Vds clamp @ Isd 85% 80% -50 -25 0 25 50 75 100 125 150 Vin clamp @ 10mA Figure 19 - Vin clamp1 & Vin clamp2 (%) Vs Tj (oC) www.irf.com 9 IPS0551T Case outline Super TO220 A 11.00 [.433] 10.00 [.394] 5.00 [.196] 4.00 [.158] B 9.00 [.354] 8.00 [.315] 0.25 [.010] BA 1.50 [.059] 0.50 [.020] 4 15.00 [.590] 14.00 [.552] 13.50 [.531] 12.50 [.493] 1 2 3 LEAD AS S IGNMENTS MOS F ET 4.00 [.157] 3.50 [.138] 14.50 [.570] 13.00 [.512] IGBT 1 - GATE 2 - COLLECTOR 3 - EMIT TER 4 - COLLECTOR 1 - GATE 2 - DRAIN 3 - S OURCE 4 - DRAIN 4X 1.00 [.039] 0.70 [.028] 3.00 [.118] 2.50 [.099] 3X 2.55 [.100] 2X 1.30 [.051] 0.90 [.036] BA OS 1. 2. 3. 4. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994. CONTROLLING DIMENSION: MILLIMET ER. DIMENSIONS ARE SHOWN IN MILLIMET ERS [INCHES]. OUT LINE CONFORMS TO JEDEC OUT LINE T O-273AA. 0.25 [.010] 01-3073 02 Case outline Super SMD220 (advance information) IRGB-012-012 5 4/17/2000 10 www.irf.com |
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